CENTER_EBR_CIB_10K Bit Data

 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
E
 
M
E
E
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
E
 
M
E
E

Mux driving 9400_N14_JECLKBRG0

Source F24B0
G_JECSOUT0_ECLKBRIDGECS 1

Mux driving 9400_N14_JECLKBRG1

Source F24B1
G_JECSOUT1_ECLKBRIDGECS 1

Mux driving 9400_S15_JECLKBRG0

Source F24B0
G_JECSOUT0_ECLKBRIDGECS 1

Mux driving 9400_S15_JECLKBRG1

Source F24B1
G_JECSOUT1_ECLKBRIDGECS 1

Mux driving G_EBRG0CLK1

Source F27B0 F28B0
G_JRPLLCLK0 - -
G_JPCLKT21 1 -
G_JLPLLCLK1 - 1
G_ECLKCIBB1 1 1

Mux driving G_EBRG1CLK1

Source F27B1 F28B1
G_JRPLLCLK0 - -
G_JPCLKT01 1 -
G_JLPLLCLK1 - 1
G_ECLKCIBT1 1 1

Configuration Setting ECLKBRIDGECS0.MODE

Default value: NONE

Value F26B0
NONE -
ECLKBRIDGECS 1

Configuration Setting ECLKBRIDGECS1.MODE

Default value: NONE

Value F26B1
NONE -
ECLKBRIDGECS 1

Fixed Connections

SourceSink
G_EBRG0CLK0→ G_CLK0_0_ECLKBRIDGECS
G_EBRG1CLK0→ G_CLK0_1_ECLKBRIDGECS
G_VPRXCLKI60→ G_CLK0_6_DCM
G_VPRXCLKI70→ G_CLK0_7_DCM
G_EBRG0CLK1→ G_CLK1_0_ECLKBRIDGECS
G_EBRG1CLK1→ G_CLK1_1_ECLKBRIDGECS
G_VPRXCLKI61→ G_CLK1_6_DCM
G_VPRXCLKI71→ G_CLK1_7_DCM
G_VPRXCLKI0→ G_CLKI0_DCC
G_VPRXCLKI1→ G_CLKI1_DCC
G_VPRXCLKI2→ G_CLKI2_DCC
G_VPRXCLKI3→ G_CLKI3_DCC
G_VPRXCLKI4→ G_CLKI4_DCC
G_VPRXCLKI5→ G_CLKI5_DCC
G_DCMOUT6_DCM→ G_CLKI6_DCC
G_DCMOUT7_DCM→ G_CLKI7_DCC
G_JLPLLCLK0→ G_EBRG0CLK0
G_JLPLLCLK0→ G_EBRG1CLK0
G_JECLKCIBB0→ G_ECLKCIBB0
G_JECLKCIBB1→ G_ECLKCIBB1
G_JECLKCIBT0→ G_ECLKCIBT0
G_JECLKCIBT1→ G_ECLKCIBT1
9400_S15_JCDIV10_CLKDIV→ G_JBCDIV10
9400_S15_JCDIV11_CLKDIV→ G_JBCDIV11
9400_S15_JCDIVX0_CLKDIV→ G_JBCDIVX0
9400_S15_JCDIVX1_CLKDIV→ G_JBCDIVX1
JA0→ G_JCE0_DCC
JB0→ G_JCE1_DCC
JC0→ G_JCE2_DCC
JD0→ G_JCE3_DCC
JA1→ G_JCE4_DCC
JB1→ G_JCE5_DCC
JC1→ G_JCE6_DCC
JD1→ G_JCE7_DCC
9400_S15_JCLK2→ G_JECLKCIBB0
9400_S15_JCLK3→ G_JECLKCIBB1
9400_N14_JCLK2→ G_JECLKCIBT0
9400_N14_JCLK3→ G_JECLKCIBT1
9400_N14W23_JCLKOP_PLL→ G_JLPLLCLK0
9400_N14W23_JCLKOS_PLL→ G_JLPLLCLK1
9400_N14W23_JCLKOS2_PLL→ G_JLPLLCLK2
9400_N14W23_JCLKOS3_PLL→ G_JLPLLCLK3
9400_S7W24_JCLK0→ G_JPCLKCIBLLQ0
9400_S7W24_JCLK1→ G_JPCLKCIBLLQ1
9400_S7E24_JCLK0→ G_JPCLKCIBLRQ0
9400_S7E24_JCLK1→ G_JPCLKCIBLRQ1
9400_S7_JCLK0→ G_JPCLKCIBMID2
9400_S7_JCLK1→ G_JPCLKCIBMID3
9400_S15_JCLK0→ G_JPCLKCIBVIQB0
9400_S15_JCLK1→ G_JPCLKCIBVIQB1
9400_N14_JCLK0→ G_JPCLKCIBVIQT0
9400_N14_JCLK1→ G_JPCLKCIBVIQT1
9400_N15_JINCK0→ G_JPCLKT00
9400_N15_JINCK1→ G_JPCLKT01
9400_E25_JINCK0→ G_JPCLKT10
9400_S16_JINCK0→ G_JPCLKT20
9400_S16_JINCK1→ G_JPCLKT21
9400_W25_JINCK0→ G_JPCLKT30
9400_W3_JA5→ G_JSEL0_ECLKBRIDGECS
9400_W3_JB5→ G_JSEL1_ECLKBRIDGECS
JA5→ G_JSEL6_DCM
JB5→ G_JSEL7_DCM
9400_S15_JA5→ G_JSNETCIBB0
9400_S15_JB5→ G_JSNETCIBB1
9400_W24_JA5→ G_JSNETCIBL0
9400_W24_JB5→ G_JSNETCIBL1
9400_N7W1_JA5→ G_JSNETCIBMID0
9400_N7W1_JB5→ G_JSNETCIBMID1
9400_S7W1_JC5→ G_JSNETCIBMID2
9400_S7W1_JD5→ G_JSNETCIBMID3
9400_N7E1_JA5→ G_JSNETCIBMID4
9400_N7E1_JB5→ G_JSNETCIBMID5
9400_S7E1_JC5→ G_JSNETCIBMID6
9400_S7E1_JD5→ G_JSNETCIBMID7
9400_E24_JA5→ G_JSNETCIBR0
9400_E24_JB5→ G_JSNETCIBR1
9400_N14_JA5→ G_JSNETCIBT0
9400_N14_JB5→ G_JSNETCIBT1
9400_N14_JCDIV10_CLKDIV→ G_JTCDIV10
9400_N14_JCDIV11_CLKDIV→ G_JTCDIV11
9400_N14_JCDIVX0_CLKDIV→ G_JTCDIVX0
9400_N14_JCDIVX1_CLKDIV→ G_JTCDIVX1
G_JPCLKCIBLLQ0→ G_PCLKCIBLLQ0
G_JPCLKCIBLLQ1→ G_PCLKCIBLLQ1
G_JPCLKCIBLRQ0→ G_PCLKCIBLRQ0
G_JPCLKCIBLRQ1→ G_PCLKCIBLRQ1
G_JPCLKCIBMID2→ G_PCLKCIBMID2
G_JPCLKCIBMID3→ G_PCLKCIBMID3
G_JPCLKCIBVIQB0→ G_PCLKCIBVIQB0
G_JPCLKCIBVIQB1→ G_PCLKCIBVIQB1
G_JPCLKCIBVIQT0→ G_PCLKCIBVIQT0
G_JPCLKCIBVIQT1→ G_PCLKCIBVIQT1
G_CLKO0_DCC→ G_VPRX0000
G_CLKO1_DCC→ G_VPRX0100
G_CLKO2_DCC→ G_VPRX0200
G_CLKO3_DCC→ G_VPRX0300
G_CLKO4_DCC→ G_VPRX0400
G_CLKO5_DCC→ G_VPRX0500
G_CLKO6_DCC→ G_VPRX0600
G_CLKO7_DCC→ G_VPRX0700