PLL1_LR Bit Data

 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
C
C
C
C
C
C
C
C
C
C
C
C
C
D
D
D
D
D
D
D
D
D
 
 
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
M
M
M
M
E
E
E
E
E
S
T
T
T
T
T
T
 
D
D
D
D
D
P
D
D
D
P
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 

Configuration word CLKOP_DIV

Default value: 7'b0000000

CLKOP_DIV[0]F43B0
CLKOP_DIV[1]F44B0
CLKOP_DIV[2]F45B0
CLKOP_DIV[3]F46B0
CLKOP_DIV[4]F47B0
CLKOP_DIV[5]F48B0
CLKOP_DIV[6]F49B0

Configuration word CLKOS2_CPHASE

Default value: 7'b000000X

CLKOS2_CPHASE[0]
CLKOS2_CPHASE[1]F30B0
CLKOS2_CPHASE[2]F31B0
CLKOS2_CPHASE[3]F32B0
CLKOS2_CPHASE[4]F33B0
CLKOS2_CPHASE[5]F34B0
CLKOS2_CPHASE[6]F35B0

Configuration word CLKOS2_DIV

Default value: 7'b0000000

CLKOS2_DIV[0]F59B0
CLKOS2_DIV[1]F60B0
CLKOS2_DIV[2]F61B0
CLKOS2_DIV[3]F62B0
CLKOS2_DIV[4]F63B0
CLKOS2_DIV[5]F64B0
CLKOS2_DIV[6]F65B0

Configuration word CLKOS3_CPHASE

Default value: 7'b0000000

CLKOS3_CPHASE[0]F36B0
CLKOS3_CPHASE[1]F37B0
CLKOS3_CPHASE[2]F38B0
CLKOS3_CPHASE[3]F39B0
CLKOS3_CPHASE[4]F40B0
CLKOS3_CPHASE[5]F41B0
CLKOS3_CPHASE[6]F42B0

Configuration word CLKOS3_DIV

Default value: 7'b0000000

CLKOS3_DIV[0]F66B0
CLKOS3_DIV[1]F67B0
CLKOS3_DIV[2]F68B0
CLKOS3_DIV[3]F69B0
CLKOS3_DIV[4]F70B0
CLKOS3_DIV[5]F71B0
CLKOS3_DIV[6]F72B0

Configuration word CLKOS_DIV

Default value: 7'b0000000

CLKOS_DIV[0]F50B0
CLKOS_DIV[1]F51B0
CLKOS_DIV[2]F54B0
CLKOS_DIV[3]F55B0
CLKOS_DIV[4]F56B0
CLKOS_DIV[5]F57B0
CLKOS_DIV[6]F58B0

Configuration word MFG1_TEST

Default value: 3'b000

MFG1_TEST[0]F86B0
MFG1_TEST[1]F87B0
MFG1_TEST[2]F88B0

Configuration word MFG2_TEST

Default value: 3'b000

MFG2_TEST[0]F83B0
MFG2_TEST[1]F84B0
MFG2_TEST[2]F85B0

Configuration Setting CLKOP_ENABLE

Default value: DISABLED

Value F77B0
DISABLED -
ENABLED 1

Configuration Setting CLKOP_TRIM_DELAY

Default value: 0

Value F90B0 F91B0 F92B0 F93B0 F94B0
0 0 0 0 0 0
1 1 1 1 0 0
2 1 1 0 1 0
4 1 1 0 0 1

Configuration Setting CLKOP_TRIM_POL

Default value: FALLING

Value F95B0
FALLING 0
RISING 1

Configuration Setting CLKOS2_ENABLE

Default value: DISABLED

Value F79B0
DISABLED -
ENABLED 1

Configuration Setting CLKOS3_ENABLE

Default value: DISABLED

Value F80B0
DISABLED -
ENABLED 1

Configuration Setting CLKOS_ENABLE

Default value: DISABLED

Value F78B0
DISABLED -
ENABLED 1

Configuration Setting CLKOS_TRIM_DELAY

Default value: 0

Value F91B0 F96B0 F97B0 F98B0
0 0 0 0 0
1 1 1 0 0
2 1 0 1 0
4 1 0 0 1

Configuration Setting CLKOS_TRIM_POL

Default value: FALLING

Value F99B0
FALLING 0
RISING 1

Configuration Setting DPHASE_SOURCE

Default value: DISABLED

Value F82B0
DISABLED 0
ENABLED 1

Configuration Setting OUTDIVIDER_MUXA

Default value: DIVA

Value F73B0
DIVA -
REFCLK 1

Configuration Setting OUTDIVIDER_MUXB

Default value: DIVB

Value F74B0
DIVB -
REFCLK 1

Configuration Setting OUTDIVIDER_MUXC

Default value: DIVC

Value F75B0
DIVC -
REFCLK 1

Configuration Setting OUTDIVIDER_MUXD

Default value: DIVD

Value F76B0
DIVD -
REFCLK 1

Configuration Setting SYNC_ENABLE

Default value: DISABLED

Value F81B0
DISABLED 0
ENABLED 1