MIB2_DSP8 Bit Data

 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
B
B
C
C
C
P
M
C
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
C
C
C
 
 
C
C
M
 
C
 
 
C
C
C
C
C
C
C
C
C
C
C
C
 
 
 
 
C
C
 
 
C
C
C
C
C
C
C
C
C
C
C
C
 
 
 
 
 
 
 
 
 
 
 
 
 

Mux driving W2_JP0

Source F23B1
W2_JCO0 1

Mux driving W2_JP1

Source F23B1
W2_JCO1 1

Mux driving W2_JP10

Source F23B1
W2_JCO10 1

Mux driving W2_JP11

Source F23B1
W2_JCO11 1

Mux driving W2_JP12

Source F23B1
W2_JCO12 1

Mux driving W2_JP13

Source F23B1
W2_JCO13 1

Mux driving W2_JP14

Source F23B1
W2_JCO14 1

Mux driving W2_JP15

Source F23B1
W2_JCO15 1

Mux driving W2_JP16

Source F23B1
W2_JCO16 1

Mux driving W2_JP17

Source F23B1
W2_JCO17 1

Mux driving W2_JP18

Source F23B1
W2_JCO18 1

Mux driving W2_JP19

Source F23B1
W2_JCO19 1

Mux driving W2_JP2

Source F23B1
W2_JCO2 1

Mux driving W2_JP20

Source F23B1
W2_JCO20 1

Mux driving W2_JP21

Source F23B1
W2_JCO21 1

Mux driving W2_JP22

Source F23B1
W2_JCO22 1

Mux driving W2_JP23

Source F23B1
W2_JCO23 1

Mux driving W2_JP24

Source F23B1
W2_JCO24 1

Mux driving W2_JP25

Source F23B1
W2_JCO25 1

Mux driving W2_JP26

Source F23B1
W2_JCO26 1

Mux driving W2_JP27

Source F23B1
W2_JCO27 1

Mux driving W2_JP28

Source F23B1
W2_JCO28 1

Mux driving W2_JP29

Source F23B1
W2_JCO29 1

Mux driving W2_JP3

Source F23B1
W2_JCO3 1

Mux driving W2_JP30

Source F23B1
W2_JCO30 1

Mux driving W2_JP31

Source F23B1
W2_JCO31 1

Mux driving W2_JP32

Source F23B1
W2_JCO32 1

Mux driving W2_JP33

Source F23B1
W2_JCO33 1

Mux driving W2_JP34

Source F23B1
W2_JCO34 1

Mux driving W2_JP35

Source F23B1
W2_JCO35 1

Mux driving W2_JP36

Source F23B1
W2_JCO36 1

Mux driving W2_JP37

Source F23B1
W2_JCO37 1

Mux driving W2_JP38

Source F23B1
W2_JCO38 1

Mux driving W2_JP39

Source F23B1
W2_JCO39 1

Mux driving W2_JP4

Source F23B1
W2_JCO4 1

Mux driving W2_JP40

Source F23B1
W2_JCO40 1

Mux driving W2_JP41

Source F23B1
W2_JCO41 1

Mux driving W2_JP42

Source F23B1
W2_JCO42 1

Mux driving W2_JP43

Source F23B1
W2_JCO43 1

Mux driving W2_JP44

Source F23B1
W2_JCO44 1

Mux driving W2_JP45

Source F23B1
W2_JCO45 1

Mux driving W2_JP46

Source F23B1
W2_JCO46 1

Mux driving W2_JP47

Source F23B1
W2_JCO47 1

Mux driving W2_JP48

Source F23B1
W2_JCO48 1

Mux driving W2_JP49

Source F23B1
W2_JCO49 1

Mux driving W2_JP5

Source F23B1
W2_JCO5 1

Mux driving W2_JP50

Source F23B1
W2_JCO50 1

Mux driving W2_JP51

Source F23B1
W2_JCO51 1

Mux driving W2_JP52

Source F23B1
W2_JCO52 1

Mux driving W2_JP53

Source F23B1
W2_JCO53 1

Mux driving W2_JP6

Source F23B1
W2_JCO6 1

Mux driving W2_JP7

Source F23B1
W2_JCO7 1

Mux driving W2_JP8

Source F23B1
W2_JCO8 1

Mux driving W2_JP9

Source F23B1
W2_JCO9 1

Configuration Setting ALU54_7.MODE

Default value: NONE

Value F24B1
NONE -
ALU54B 1

Configuration Setting ALU54_7.REG_INPUTC0_CLK

Default value: NONE

Value F63B1 F64B1
NONE - -
CLK0 1 1
CLK1 1 1
CLK2 1 1
CLK3 1 1

Configuration Setting ALU54_7.REG_OPCODEIN_0_CE

Default value: CE3

Value F71B1 F72B1
CE0 1 1
CE1 1 -
CE2 - 1
CE3 - -

Configuration Setting ALU54_7.REG_OPCODEIN_1_CE

Default value: CE3

Value F67B1 F70B1
CE0 1 1
CE1 1 -
CE2 - 1
CE3 - -

Configuration Setting ALU54_7.REG_OUTPUT0_CLK

Default value: NONE

Value F87B1 F88B1
NONE - -
CLK0 1 1
CLK1 1 1
CLK2 1 1
CLK3 1 1

Configuration Setting ALU54_7.REG_OUTPUT1_CLK

Default value: NONE

Value F49B1 F66B1
NONE - -
CLK0 1 1
CLK1 1 1
CLK2 1 1
CLK3 1 1

Configuration Setting DSP_RIGHT.CIBOUT

Default value: OFF

Value F20B1 F21B1 F22B1 F25B1
OFF - - - -
ON 1 1 1 1

Configuration Setting MULT18_4.CIBOUT_BYP

Default value: ON

Value F49B1 F66B1 F87B1 F88B1
OFF 1 1 1 1
ON - - - -

Configuration Setting MULT18_4.REG_INPUTA_CE

Default value: CE3

Value F54B1 F55B1 F68B1 F69B1 F91B1 F92B1
CE0 1 1 1 1 1 1
CE1 1 - 1 - - 1
CE2 - 1 - 1 1 -
CE3 - - - - - -

Configuration Setting MULT18_4.REG_INPUTB_CE

Default value: CE3

Value F51B1 F65B1 F83B1 F84B1 F89B1 F90B1
CE0 1 1 1 1 1 1
CE1 - 1 - 1 - 1
CE2 1 - 1 - 1 -
CE3 - - - - - -

Configuration Setting MULT18_4.REG_INPUTC_CLK

Default value: NONE

Value F63B1 F64B1
NONE - -
CLK0 1 1
CLK1 1 1
CLK2 1 1
CLK3 1 1

Configuration Setting MULT18_4.REG_OUTPUT_CLK

Default value: NONE

Value F49B1 F66B1 F87B1 F88B1
NONE - - - -
CLK0 1 1 1 1
CLK1 1 1 1 1
CLK2 1 1 1 1
CLK3 1 1 1 1

Configuration Setting MULT18_4.REG_PIPELINE_CE

Default value: CE3

Value F61B1 F62B1 F77B1 F78B1 F81B1 F82B1 F85B1 F86B1
CE0 1 1 1 1 1 1 1 1
CE1 - 1 - 1 - 1 - 1
CE2 1 - 1 - 1 - 1 -
CE3 - - - - - - - -

Configuration Setting MULT18_5.CIBOUT_BYP

Default value: OFF

Value F18B1 F19B1
OFF - -
ON 1 1

Configuration Setting MULT18_5.MODE

Default value: NONE

Value F56B1
NONE -
MULT18X18D 1

Configuration Setting MULT18_5.REG_PIPELINE_CLK

Default value: CLK3

Value F50B1 F58B1
NONE 1 1
CLK0 - -
CLK1 - -
CLK2 - -
CLK3 - -