ECLK_L Bit Data

E
E
E
E
E
E
E
E
E
E
E
E
E
E
E
E
E
E
E
E
E
E
E
E
 
 
 
 
 
M
M
M
M
D
D
D
D
 
 
 
 
C
C
C
C
G
G
M
M
L
 
 
 
 
V
V
V
V
V
V
V
V
A
D
I
 
V
V
V
V
V
V
V
V
A
D
I
 
V
V
V
V
V
V
V
V
A
D
I
 
V
V
V
V
V
V
V
V
A
D
I
 
 
 
 
 

Mux driving G_JLECLK1

Source F49B0
W2_JECLKO_BRGECLKSYNC1 1

Mux driving N1W2_DDRDEL

Source F63B0
G_ULDDRDEL -
G_LLDDRDEL 1

Mux driving N1W2_JINCK

Source F64B0
N1W2_JPADDI -
N1W2_DLLDEL 1

Mux driving S1W2_DDRDEL

Source F87B0
G_ULDDRDEL -
G_LLDDRDEL 1

Mux driving S1W2_ECLKI0

Source F8B0 F9B0 F10B0 F11B0
G_JPCLKT70 0 0 1 0
G_JPCLKT71 1 0 1 0
G_JPCLKT60 0 1 1 0
G_JPCLKT61 1 1 1 0
G_JULQECLKCIB0 0 0 0 1
G_JLLQECLKCIB0 1 0 0 1
G_JULCPLL0CLKOS 0 1 0 1
G_JULCPLL0CLKOP 1 1 0 1
G_JLLCPLL0CLKOS 0 0 1 1
G_JLLCPLL0CLKOP 1 0 1 1

Mux driving S1W2_JECLK0

Source F20B0 F21B0
S1W2_SYNCECLK0 0 0
S1W2_JBRGECLK0 1 0
S1W2_JNEIGHBORECLK0 0 1

Mux driving S1W2_JECLK1

Source F22B0 F23B0
S1W2_SYNCECLK1 0 0
S1W2_JBRGECLK1 1 0
S1W2_JNEIGHBORECLK1 0 1

Mux driving S1W2_JECLKI1

Source F12B0 F13B0 F14B0 F15B0
G_JPCLKT70 0 0 1 0
G_JPCLKT71 1 0 1 0
G_JPCLKT60 0 1 1 0
G_JPCLKT61 1 1 1 0
G_JULQECLKCIB1 0 0 0 1
G_JLLQECLKCIB1 1 0 0 1
G_JULCPLL0CLKOS 0 1 0 1
G_JULCPLL0CLKOP 1 1 0 1
G_JLLCPLL0CLKOS 0 0 1 1
G_JLLCPLL0CLKOP 1 0 1 1

Mux driving S1W2_JINCK

Source F88B0
S1W2_JPADDI -
S1W2_DLLDEL 1

Mux driving S2W2_DDRDEL

Source F99B0
G_ULDDRDEL -
G_LLDDRDEL 1

Mux driving S2W2_JINCK

Source F100B0
S2W2_JPADDI -
S2W2_DLLDEL 1

Mux driving W2_CLKI0

Source F41B0 F42B0
G_BANK6ECLK0 - 1
G_BANK7ECLK0 1 1

Mux driving W2_CLKI1

Source F43B0 F44B0
G_BANK6ECLK1 - 1
G_BANK7ECLK1 1 1

Mux driving W2_DDRDEL

Source F75B0
G_ULDDRDEL -
G_LLDDRDEL 1

Mux driving W2_ECLKI0

Source F0B0 F1B0 F2B0 F3B0
G_JPCLKT70 0 0 1 0
G_JPCLKT71 1 0 1 0
G_JPCLKT60 0 1 1 0
G_JPCLKT61 1 1 1 0
G_JULQECLKCIB0 0 0 0 1
G_JLLQECLKCIB0 1 0 0 1
G_JULCPLL0CLKOS 0 1 0 1
G_JULCPLL0CLKOP 1 1 0 1
G_JLLCPLL0CLKOS 0 0 1 1
G_JLLCPLL0CLKOP 1 0 1 1

Mux driving W2_JECLK0

Source F16B0 F17B0
W2_SYNCECLK0 0 0
W2_JBRGECLK0 1 0
W2_JNEIGHBORECLK0 0 1

Mux driving W2_JECLK1

Source F18B0 F19B0
W2_SYNCECLK1 0 0
W2_JBRGECLK1 1 0
W2_JNEIGHBORECLK1 0 1

Mux driving W2_JECLKI1

Source F4B0 F5B0 F6B0 F7B0
G_JPCLKT70 0 0 1 0
G_JPCLKT71 1 0 1 0
G_JPCLKT60 0 1 1 0
G_JPCLKT61 1 1 1 0
G_JULQECLKCIB1 0 0 0 1
G_JLLQECLKCIB1 1 0 0 1
G_JULCPLL0CLKOS 0 1 0 1
G_JULCPLL0CLKOP 1 1 0 1
G_JLLCPLL0CLKOS 0 0 1 1
G_JLLCPLL0CLKOP 1 0 1 1

Mux driving W2_JINCK

Source F76B0
W2_JPADDI -
W2_DLLDEL 1

Configuration word DLLDEL_60.DEL_VAL

Default value: 8'b00000000

DLLDEL_60.DEL_VAL[0]F78B0
DLLDEL_60.DEL_VAL[1]F79B0
DLLDEL_60.DEL_VAL[2]F80B0
DLLDEL_60.DEL_VAL[3]F81B0
DLLDEL_60.DEL_VAL[4]F82B0
DLLDEL_60.DEL_VAL[5]F83B0
DLLDEL_60.DEL_VAL[6]F84B0
DLLDEL_60.DEL_VAL[7]F85B0

Configuration word DLLDEL_61.DEL_VAL

Default value: 8'b00000000

DLLDEL_61.DEL_VAL[0]F90B0
DLLDEL_61.DEL_VAL[1]F91B0
DLLDEL_61.DEL_VAL[2]F92B0
DLLDEL_61.DEL_VAL[3]F93B0
DLLDEL_61.DEL_VAL[4]F94B0
DLLDEL_61.DEL_VAL[5]F95B0
DLLDEL_61.DEL_VAL[6]F96B0
DLLDEL_61.DEL_VAL[7]F97B0

Configuration word DLLDEL_70.DEL_VAL

Default value: 8'b00000000

DLLDEL_70.DEL_VAL[0]F54B0
DLLDEL_70.DEL_VAL[1]F55B0
DLLDEL_70.DEL_VAL[2]F56B0
DLLDEL_70.DEL_VAL[3]F57B0
DLLDEL_70.DEL_VAL[4]F58B0
DLLDEL_70.DEL_VAL[5]F59B0
DLLDEL_70.DEL_VAL[6]F60B0
DLLDEL_70.DEL_VAL[7]F61B0

Configuration word DLLDEL_71.DEL_VAL

Default value: 8'b00000000

DLLDEL_71.DEL_VAL[0]F66B0
DLLDEL_71.DEL_VAL[1]F67B0
DLLDEL_71.DEL_VAL[2]F68B0
DLLDEL_71.DEL_VAL[3]F69B0
DLLDEL_71.DEL_VAL[4]F70B0
DLLDEL_71.DEL_VAL[5]F71B0
DLLDEL_71.DEL_VAL[6]F72B0
DLLDEL_71.DEL_VAL[7]F73B0

Configuration Setting BRGECLKSYNC1.MODE

Default value: NONE

Value F47B0
NONE -
ECLKSYNCB 1

Configuration Setting CLKDIV_L0.DIV

Value F33B0 F35B0
2.0 1 0
3.5 0 1

Configuration Setting CLKDIV_L0.GSR

Default value: ENABLED

Value F45B0
DISABLED 1
ENABLED 0

Configuration Setting CLKDIV_L1.DIV

Value F34B0 F36B0
2.0 1 0
3.5 0 1

Configuration Setting CLKDIV_L1.GSR

Default value: ENABLED

Value F46B0
DISABLED 1
ENABLED 0

Configuration Setting DLLDEL_60.DEL_ADJ

Default value: PLUS

Value F86B0
MINUS 1
PLUS 0

Configuration Setting DLLDEL_61.DEL_ADJ

Default value: PLUS

Value F98B0
MINUS 1
PLUS 0

Configuration Setting DLLDEL_70.DEL_ADJ

Default value: PLUS

Value F62B0
MINUS 1
PLUS 0

Configuration Setting DLLDEL_71.DEL_ADJ

Default value: PLUS

Value F74B0
MINUS 1
PLUS 0

Configuration Setting ECLKBRIDGECS1.MODE

Default value: NONE

Value F48B0
NONE -
ECLKBRIDGECS 1

Configuration Setting ECLKSYNC0_BK6.MODE

Default value: NONE

Value F31B0
NONE -
ECLKSYNCB 1

Configuration Setting ECLKSYNC0_BK7.MODE

Default value: NONE

Value F29B0
NONE -
ECLKSYNCB 1

Configuration Setting ECLKSYNC1_BK6.MODE

Default value: NONE

Value F32B0
NONE -
ECLKSYNCB 1

Configuration Setting ECLKSYNC1_BK7.MODE

Default value: NONE

Value F30B0
NONE -
ECLKSYNCB 1

Fixed Connections

SourceSink
W2_CLKI0 W2_CLKI_CLKDIV0
W2_CLKI1 W2_CLKI_CLKDIV1
G_ULDDRDEL N1W2_DDRDEL
G_ULDDRDEL S1W2_DDRDEL
G_ULDDRDEL S2W2_DDRDEL
G_ULDDRDEL W2_DDRDEL
N1W2_DDRDEL N1W2_DDRDEL_DLLDEL
S1W2_DDRDEL S1W2_DDRDEL_DLLDEL
S2W2_DDRDEL S2W2_DDRDEL_DLLDEL
W2_DDRDEL W2_DDRDEL_DLLDEL
N1W2_Z_DLLDEL N1W2_DLLDEL
S1W2_Z_DLLDEL S1W2_DLLDEL
S2W2_Z_DLLDEL S2W2_DLLDEL
W2_Z_DLLDEL W2_DLLDEL
W2_ECSOUT_ECLKBRIDGECS1 W2_ECLKI_BRGECLKSYNC1
S1W2_ECLKI0 S1W2_ECLKI_ECLKSYNC0
W2_ECLKI0 W2_ECLKI_ECLKSYNC0
S1W2_JECLKI1 S1W2_ECLKI_ECLKSYNC1
W2_JECLKI1 W2_ECLKI_ECLKSYNC1
S1W2_JECLK0 G_BANK6ECLK0
S1W2_JECLK1 G_BANK6ECLK1
W2_JECLK0 G_BANK7ECLK0
W2_JECLK1 G_BANK7ECLK1
G_JLECLK1 G_JBRGECLK1
W2_JCDIVX_CLKDIV0 G_JLCDIVX0
W2_JCDIVX_CLKDIV1 G_JLCDIVX1
S2W1_JCLK0 G_JLLQECLKCIB0
S2W1_JCLK1 G_JLLQECLKCIB1
S1W2_JINCK G_JPCLKT60
S2W2_JINCK G_JPCLKT61
N1W2_JINCK G_JPCLKT70
W2_JINCK G_JPCLKT71
N1W1_JCLK0 G_JULQECLKCIB0
N1W1_JCLK1 G_JULQECLKCIB1
JA3 W2_JALIGNWD_CLKDIV0
JB3 W2_JALIGNWD_CLKDIV1
N2W2_JPADDIC_PIO N1W2_JA_DLLDEL
S1W2_JPADDIC_PIO S1W2_JA_DLLDEL
S1W2_JPADDIA_PIO S2W2_JA_DLLDEL
N2W2_JPADDIA_PIO W2_JA_DLLDEL
G_JBRGECLK0 S1W2_JBRGECLK0
G_JBRGECLK0 W2_JBRGECLK0
G_JBRGECLK1 S1W2_JBRGECLK1
G_JBRGECLK1 W2_JBRGECLK1
W2_JECLKI1 W2_JCLK0_ECLKBRIDGECS1
S1W2_JECLKI1 W2_JCLK1_ECLKBRIDGECS1
N1W1_JD6 N1W2_JDIRECTION_DLLDEL
S1W1_JD6 S1W2_JDIRECTION_DLLDEL
S2W1_JD6 S2W2_JDIRECTION_DLLDEL
W1_JD6 W2_JDIRECTION_DLLDEL
S1W2_ECLKI_ECLKSYNC0 S1W2_JECLKO_ECLKSYNC0
W2_ECLKI_ECLKSYNC0 W2_JECLKO_ECLKSYNC0
S1W2_ECLKI_ECLKSYNC1 S1W2_JECLKO_ECLKSYNC1
W2_ECLKI_ECLKSYNC1 W2_JECLKO_ECLKSYNC1
W2_JCDIVX_CLKDIV0 JF2
W2_JCDIVX_CLKDIV1 JF3
N1W2_JPADDI N1W2_JINCK
S1W2_JPADDI S1W2_JINCK
S2W2_JPADDI S2W2_JINCK
W2_JPADDI W2_JINCK
N1W1_JB6 N1W2_JLOADN_DLLDEL
S1W1_JB6 S1W2_JLOADN_DLLDEL
S2W1_JB6 S2W2_JLOADN_DLLDEL
W1_JB6 W2_JLOADN_DLLDEL
N1W1_JC6 N1W2_JMOVE_DLLDEL
S1W1_JC6 S1W2_JMOVE_DLLDEL
S2W1_JC6 S2W2_JMOVE_DLLDEL
W1_JC6 W2_JMOVE_DLLDEL
W2_JECLKO_ECLKSYNC0 S1W2_JNEIGHBORECLK0
S1W2_JECLKO_ECLKSYNC0 W2_JNEIGHBORECLK0
W2_JECLKO_ECLKSYNC1 S1W2_JNEIGHBORECLK1
S1W2_JECLKO_ECLKSYNC1 W2_JNEIGHBORECLK1
N2W2_JPADDIC_PIO N1W2_JPADDI
S1W2_JPADDIC_PIO S1W2_JPADDI
S1W2_JPADDIA_PIO S2W2_JPADDI
N2W2_JPADDIA_PIO W2_JPADDI
N1W2_JCFLAG_DLLDEL N1W1_JQ7
S1W2_JCFLAG_DLLDEL S1W1_JQ7
S2W2_JCFLAG_DLLDEL S2W1_JQ7
W2_JCFLAG_DLLDEL W1_JQ7
JLSR0 W2_JRST_CLKDIV0
JLSR1 W2_JRST_CLKDIV1
JA6 W2_JSEL_ECLKBRIDGECS1
JA7 W2_JSTOP_BRGECLKSYNC1
JC0 S1W2_JSTOP_ECLKSYNC0
JA0 W2_JSTOP_ECLKSYNC0
JD0 S1W2_JSTOP_ECLKSYNC1
JB0 W2_JSTOP_ECLKSYNC1
S1W2_JECLKO_ECLKSYNC0 S1W2_SYNCECLK0
W2_JECLKO_ECLKSYNC0 W2_SYNCECLK0
S1W2_JECLKO_ECLKSYNC1 S1W2_SYNCECLK1
W2_JECLKO_ECLKSYNC1 W2_SYNCECLK1